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Our client specialises in high frequency algorithmic trading. The role will involve working on hardware solutions in order to shave nanoseconds and improve fill rates at the exchanges in order to facilitate latency arbitrage trades. The role will involve working within a small team. There are currently 10 FPGA engineers within the group. The main challenges will involve working on both the design, verification and research of new technologies. The key challenges are at the intersection of network communication, encoding/decoding, end-to-end design, development and testing of FPGA data feed adapters, FPGA based TCP+UDP stack, proprietary microwave network data, and speeding up LZO compression/decompression. Working with quants and developers, understanding their problems and working on optimal hardware solutions. 

Requires

• 5 Years of industry experience at the intersection of Ethernet / FPGA.
• FPGA expertise should focus on both design and verification. 
• An individual contributor and team player. 
• A deep understanding of trade-offs and optimal configurations for high speed networks.

If you would like to be considered for the Senior FPGA Designing and Verification Engineer position, or wish to discuss the role further then please leave your details below. Your resume will be held in confidence until you connect with a member of our team.